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FN1547.8
October 29, 2007
Absolute Maximum Ratings
Thermal Information
Supply Voltage (VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7V
Input Voltage (VIN) . . . . . . . . . . . . . . . . . . . VSS -0.3V to VDD +0.3V
Current Drain Per Input Pin (Excluding VDD and VSS I) . . . . . 10mA
Current Drain Per Output Pin I. . . . . . . . . . . . . . . . . . . . . . . . . 40mA
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +3.0V to +6.0V
Standby (Timekeeping) Voltage . . . . . . . . . . . . . . . . . +2.2V to +6.0V
Temperature Range
CDP68HC68T1E (PDIP Package) . . . . . . . . . . . . .-40°C to +85°C
CDP68HC68T1M/M2 (SOIC Packages) . . . . . . . .-40°C to +85°C
Input Voltage
Input High . . . . . . . . . . . . . . . . . . . . . . . . . . . . .(0.7 x VDD) to VDD
Input Low . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V to (0.3 x VDD)
Serial Clock Frequency (fSCK). . . . . . . . . . . . . . . . . . +3.0V to +6.0V
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
16 Ld PDIP* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
90
16 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100
20 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
95
Maximum Junction Temperature (Plastic) . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range (TSTG). . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
*Pb-free PDIPs can be used for through hole wave solder processing
only. They are not intended for use in Reflow solder processing
applications.
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1.
θJA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Static Electrical Specifications At TA = -40°C to +85°C, VDD = VBATT = 5V ±5%, Unless Otherwise Specified.
PARAMETER
SYMBOL
TEST CONDITIONS
CDP68HC68T1
UNITS
MIN
TYP
(Note 2)
MAX
Quiescent Device Current
IDD
-1
10
A
Output Voltage High Level
VOH
IOH = -1.6mA, VDD = 4.5V
3.7
-
V
Output Voltage Low Level
VOL
IOL = 1.6mA, VDD = 4.5V
-
-0.4
V
Output Voltage High Level
VOH
IOH ≤ 10A, VDD = 4.5V
4.4
-
V
Output Voltage Low Level
VOL
IOL ≤ 10A, VDD = 4.5V
-
-0.1
V
Input Leakage Current
IIN
--
±1
A
Three-State Output Leakage Current
IOUT
-
±10
A
Operating Current (Note 3)
(ID + IB) VDD = VB = 5V
Crystal Operation
32kHz
-
0.08
-
mA
1MHz
-
0.5
-
mA
2MHz
-
0.7
-
mA
4MHz
-
1
-
mA
XTAL IN Clock (Squarewave) (Note 3)
(ID + IB) VDD = VS = 5V
32kHz
-
0.02
0.024
mA
1MHz
-
0.1
0.12
mA
2MHz
-
0.2
0.24
mA
4MHz
-
0.4
0.5
mA
Standby Current (Note 3)
VS = 3V
Crystal Operation
IB
32kHz
-
20
-
A
1MHz
-
200
-
A
2MHz
-
300
-
A
4MHz
-
500
-
A
CDP68HC68T1
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